A single AI chip starts as a bucket of sand and ends, about three months later, as the most complex object humans manufacture. Along the way it passes through a handful of companies that almost no one outside the industry can name — and a few choke points that can hold up the entire AI economy.
The headline sounds like a gimmick, but it’s true: chips begin as ordinary quartz sand, purified until it’s 99.9999999% silicon — nine nines of purity. From there it’s grown into a crystal, sliced into discs, and printed with circuitry using light. Step through the full journey below.
The GPU die and its stacks of HBM memory are mounted side by side on a tiny silicon platform and wired together. This step — called CoWoS — is now one of the tightest bottlenecks in all of AI.
Who does this: TSMC, ASETap any step. The whole journey takes roughly three months per chip.
You’ll hear chips described by a "node" — 5nm, 3nm, and so on. In plain terms, a smaller number means smaller transistors, which means you can pack more of them onto a chip. More transistors = more speed and better efficiency. The leading edge is fiendishly hard: only TSMC and Samsung can make the most advanced nodes, and TSMC alone builds nearly every top-end AI chip in the world.
The machines that print these patterns — EUV lithography systems — are made by exactly one company on earth: ASML in the Netherlands. Each one costs around $200 million and contains a laser firing molten tin droplets 50,000 times a second. No ASML, no advanced chips. That’s how concentrated this supply chain is.
For decades, making the chip was the hard part. But an AI chip isn’t one piece of silicon — it’s a GPU die sitting next to several towers of HBM memory, all mounted on a tiny shared platform and wired together. Assembling that package is a craft of its own, and TSMC’s version of it (called CoWoS) became one of the single tightest bottlenecks in the entire AI build-out. For a stretch, you couldn’t buy more AI chips not because the chips were scarce, but because no one could package them fast enough.
The HBM itself is just as fiddly. Remember the fast memory from Parts 1 and 2? It’s built by stacking memory chips into towers and drilling thousands of microscopic wires straight through them. Stacking is slow and error-prone, and only SK Hynix, Micron, and Samsung do it at scale — which is exactly why HBM keeps showing up on every "AI shortage" list.
The whole chain is a series of near-monopolies stacked on top of each other: ASML for the machines, TSMC for the manufacturing and packaging, a trio of firms for the memory. Break any one link and the whole thing slows down. That fragility is the real story of AI hardware.
Part 3 of the AI Compute 101 series. Next: Training vs Inference — the two very different jobs every AI chip does.
For informational purposes only. Not investment advice. Company names illustrate who performs each step.
Quartz sand is purified to 99.9999999% silicon, grown into a single crystal, and sliced into wafers. Circuit patterns are then printed onto the wafer with light in dozens of layers, the wafer is cut into individual dies, and the die is packaged with its memory. The full cycle runs roughly three months.
The node number is shorthand for transistor scale: a smaller number means smaller transistors and more of them per chip, which buys speed and efficiency. It is no longer a literal physical measurement. Only TSMC and Samsung can manufacture at the leading edge.
ASML is the only company on earth that makes EUV lithography systems, the machines that print leading-edge circuit patterns. Each costs around $200 million and contains a laser firing molten tin droplets 50,000 times a second. No ASML machines means no advanced chips — there is no second supplier.